[linrad] Re: Linrad via Ethernet

["Bob Stiles" <b06.s@xxxxxxxxx>]

My board uses a 40MHz OCXO which Vectron sampled for me.  I
used this because it divides down easily to 10MHz, which I needed
elsewhere.  It might be hard to find an OCXO at 65MHz, though it
would be nice since you could use more decimation...

The design allows for 7 boards to be daisy-chained together for
diversity/phased array reception.  The boards occupy eight
addresses - address 0 programs all of them simultaneously.  The
clock is distributed down the chain by LVDS chips driving ethernet
patch cords.  The idea is that these can be trimmed to length to
allow precise 0 degree clock phase shifts from board to board.  Of
course, jitter will accumulate down the chain, but since the CIC
filters in the HSP50016 are averaging the data together, some phase
dithering may not be such a problem!  I used the LVPECL option on
the AD6644 datasheet to drive the sampling clock.  This gave me the
differential signals for the clock, and I found I could interface
LVDS easily to LVPECL with off-the-shelf parts.

I wouldn't recommend using anything less than a four layer board,
since modern high-speed ICs expect power-supplies that are low
impedance at high frequencies, with a ground plane and decoupling
caps as close as possible to the device pins.  This is good for the
chips, and helps to keep the power supply noise down.  (My earliest
attempts at this stuff used wirewrap, which failed miserably!)

A ground plane also lets you use constant impedance traces for your
signals.  I used a very handy tool ('Transmission Line
Rapidesigner' - like a cardboard slide-rule) from National
Semiconductor, which does the track width and spacing calculations
for you.

Two other LVDS daisy-chains are used to program the HSP50016's and
to receive the downconverted signals.  These are taken care of by
the serial ports (SPORTs) on the Blackfin.  I plan to use the
multichannel mode of the SPORTs to de-multiplex the phased array
data, but I haven't come anywhere close to evaluating this yet.

The current problem is the TCP/IP code from Analog Devices.  The
Blackfin hardware talks OK to my boards, but I'm having difficulty
with sending packets from it to a host PC down the ethernet.  In my
application the received signal is in the form of echoes, ie not
continuous but bursty, so it lends itself to being packetised.
After a few packets the code dies!  I'm wondering if the lwIP code
that's bundled with the Blackfin (BF-537 EZKIT-Lite - $350 from
Analog Devices) is really ready for the marketplace...  or is it my
programming??

The Blackfin may seem like overkill for the ethernet link, compared
to an FPGA solution, but I also plan to use it for waveform and
control purposes in other parts of the application - if it can hack
it!
73
Bob Stiles


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